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chapter2/invGate.vcd
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30
chapter2/invGate.vcd
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$date
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Sun Aug 17 06:21:41 2025
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$end
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$version
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Icarus Verilog
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$end
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$timescale
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1s
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$end
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$scope module invGateTB $end
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$var wire 1 ! B $end
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$var reg 1 " A $end
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$scope module uut $end
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$var wire 1 " A $end
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$var wire 1 ! B $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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$comment Show the parameter values. $end
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$dumpall
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$end
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#0
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$dumpvars
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1"
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0!
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$end
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#10
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1!
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0"
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#20
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