initial

chapter2/invGateTB.v

@@ -0,0 +1,19 @@
+module invGateTB();
+
+reg A;
+wire B;
+
+invGate uut (
+  .A(A),
+  .B(B)
+);
+
+initial begin
+  $dumpfile("invGate.vcd");
+  $dumpvars;
+  A = 1'b1; #10;
+  A = 1'b0; #10;
+  $finish;
+  end
+
+endmodule