initial

chapter2/mux.v

@@ -0,0 +1,14 @@
+module mux (
+  input [1:0] A,
+  input S,
+  output Y
+);
+
+wire and1, and2;
+
+and a1 (and1, A[0], S);
+and a2 (and2, A[1], ~S);
+
+or o1 (Y, and1, and2);
+
+endmodule