module pcIMem (
  input rst,
  input clk,
  output reg [31:0] pc,
  output reg [31:0] next_pc,
  output wire [31:0] instr
);


//PC
always @(posedge clk) begin 
  if(rst) begin
    pc <= 32'h0;
  end
  else begin 
    next_pc <= pc;
    pc <= pc + 32'h4;
  end
end

//IMem
reg [31:0] imem [0:255];

initial begin
  $readmemh("program.hex", imem);
end

assign instr = imem[pc[31:2]];

//Decoder
r


endmodule