initial commit
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29
FIRMWARE/pipeline.ld
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29
FIRMWARE/pipeline.ld
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MEMORY {
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PROGROM (RX) : ORIGIN = 0x00000, LENGTH = 0x10000 /* 64kB ROM */
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DATARAM (RW) : ORIGIN = 0x10000, LENGTH = 0x10000 /* 64kB RAM */
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}
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SECTIONS {
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.text : {
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. = ALIGN(4);
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start_pipeline.o (.text)
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*(.text*)
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} > PROGROM
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.data : {
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. = ALIGN(4);
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*(.data*)
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*(.sdata*)
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*(.rodata*)
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*(.srodata*)
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*(.bss*)
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*(.sbss*)
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*(COMMON)
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*(.eh_frame)
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*(.eh_frame_hdr)
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*(.init_array*)
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*(.gcc_except_table*)
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} > DATARAM
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}
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