initial commit

step1.v

@@ -0,0 +1,24 @@
+/**
+ * Step 1: Blinker
+ * DONE
+ */
+
+`default_nettype none
+
+module SOC (
+    input  clk,        // system clock 
+    input  rst_i,      // reset button
+    output [3:0] led, // system LEDs
+    input  RXD,        // UART receive
+    output TXD         // UART transmit
+);
+
+
+// A blinker that counts on 5 bits, wired to the 5 LEDs
+   reg [3:0] count = 0;
+   always @(posedge clk) begin
+      count <= count + 1;
+   end
+   assign led = count;
+   assign TXD  = 1'b0; // not used for now
+endmodule