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learnFPGA/FIRMWARE/spiflash0.ld
2025-08-02 06:09:31 +03:00

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MEMORY {
FLASH (RX) : ORIGIN = 0x00820000, LENGTH = 0x100000 /* 4 MB in flash */
}
SECTIONS {
everything : {
. = ALIGN(4);
start.o (.text)
*(.*)
} >FLASH
}