rearrangement
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@@ -1,9 +1,9 @@
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module halfadder(
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input A,B,
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output S,C
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);
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xor (S, A, B);
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and (C, A, B);
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module halfadder(
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input A,B,
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output S,C
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);
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xor (S, A, B);
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and (C, A, B);
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endmodule
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