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verilog

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This commit is contained in:
k0rrluna
2024-07-07 15:51:02 +03:00
parent c1f0851a45
commit 339ae1f428
35 changed files with 26577 additions and 1 deletions
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13
gowin/seq_light_test/impl/pnr/cmd.do Normal file
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-d \\wsl.localhost\Debian\home\koray\code\verilog\gowin\seq_light_test\impl\gwsynthesis\seq_light_test.vg
-p GW2A-18C-PBGA256-8
-pn GW2A-LV18PG256C8/I7
-cst \\wsl.localhost\Debian\home\koray\code\verilog\gowin\seq_light_test\src\seq_light_test.cst
-cfg \\wsl.localhost\Debian\home\koray\code\verilog\gowin\seq_light_test\impl\pnr\device.cfg
-bit
-tr
-ph
-timing
-cst_error
-correct_hold 1
-route_maxfan 23
-global_freq 100.000