hamming fix

This commit is contained in:
2024-11-06 15:43:10 +03:00
parent 1ec83b26a1
commit 7466f916d3
4 changed files with 56 additions and 49 deletions

View File

@ -1,5 +1,5 @@
$date
Tue Oct 8 14:33:58 2024
Wed Nov 6 15:42:14 2024
$end
$version
Icarus Verilog
@ -8,25 +8,31 @@ $timescale
1s
$end
$scope module htb $end
$var reg 8 ! value1 [7:0] $end
$var reg 8 " value2 [7:0] $end
$var wire 4 ! hammingValue [3:0] $end
$var reg 8 " value1 [7:0] $end
$var reg 8 # value2 [7:0] $end
$scope module uut $end
$var wire 8 # value1 [7:0] $end
$var wire 8 $ value2 [7:0] $end
$var reg 4 % hammingValue [3:0] $end
$var integer 32 & i [31:0] $end
$var wire 8 $ value1 [7:0] $end
$var wire 8 % value2 [7:0] $end
$var reg 4 & hammingValue [3:0] $end
$var integer 32 ' i [31:0] $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
b1000 &
b0 %
bz $
bz #
b10111111 "
b10110000 !
b1000 '
b100 &
b10111111 %
b10110000 $
b10111111 #
b10110000 "
b100 !
$end
#10
b10111111 !
b1000 '
b0 !
b0 &
b10111111 "
b10111111 $
#20