verilog

tetirs/obj_dir/Vtb___024root__DepSet_hfe20aad3__0__Slow.cpp

@@ -0,0 +1,25 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See Vtb.h for the primary calling header
+
+#include "verilated.h"
+
+#include "Vtb__Syms.h"
+#include "Vtb___024root.h"
+
+#ifdef VL_DEBUG
+VL_ATTR_COLD void Vtb___024root___dump_triggers__stl(Vtb___024root* vlSelf);
+#endif  // VL_DEBUG
+
+VL_ATTR_COLD void Vtb___024root___eval_triggers__stl(Vtb___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Vtb__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Vtb___024root___eval_triggers__stl\n"); );
+    // Body
+    vlSelf->__VstlTriggered.at(0U) = (0U == vlSelf->__VstlIterCount);
+#ifdef VL_DEBUG
+    if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
+        Vtb___024root___dump_triggers__stl(vlSelf);
+    }
+#endif
+}