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verilog

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k0rrluna
2024-07-12 23:57:42 +03:00
parent 610e059b8a
commit 997713f8f2
11 changed files with 359 additions and 7 deletions
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gowin/bibp/bibp.gprj Normal file
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<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
<Template>FPGA</Template>
<Version>5</Version>
<Device name="GW2A-18C" pn="GW2A-LV18PG256C8/I7">gw2a18c-011</Device>
<FileList>
<File path="src/bibp.v" type="file.verilog" enable="1"/>
</FileList>
</Project>