nand2tetris
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13
iverilog/nand2tetris/nands/or/orGate.v
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13
iverilog/nand2tetris/nands/or/orGate.v
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module orGate (
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input A_i,
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input B_i,
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output F_o
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);
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wire nand1_out, nand2_out;
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nand nand1 (nand1_out, A_i, A_i);
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nand nand2 (nand2_out, B_i, B_i);
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nand nand3 (F_o, nand1_out, nand2_out);
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endmodule
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