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verilog

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This commit is contained in:
k0rrluna
2024-07-05 19:15:16 +03:00
parent 492a55d360
commit c1f0851a45
136 changed files with 11599 additions and 0 deletions
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218
bit3-ledTest/bit3 Normal file
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#! /usr/bin/vvp
:ivl_version "11.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
S_0x55f4b1a88210 .scope module, "bit3Tb" "bit3Tb" 2 1;
.timescale 0 0;
v0x55f4b1aba170_0 .var "r1", 2 0;
v0x55f4b1aba230_0 .var "r2", 2 0;
v0x55f4b1aba300_0 .net "w1", 3 0, L_0x55f4b1abb700; 1 drivers
S_0x55f4b1a81ef0 .scope module, "uut" "bit3adder" 2 6, 3 1 0, S_0x55f4b1a88210;
.timescale 0 0;
.port_info 0 /INPUT 3 "A";
.port_info 1 /INPUT 3 "B";
.port_info 2 /OUTPUT 4 "C";
v0x55f4b1ab9cc0_0 .net "A", 2 0, v0x55f4b1aba170_0; 1 drivers
v0x55f4b1ab9dc0_0 .net "B", 2 0, v0x55f4b1aba230_0; 1 drivers
v0x55f4b1ab9ea0_0 .net "C", 3 0, L_0x55f4b1abb700; alias, 1 drivers
v0x55f4b1ab9f60_0 .net "c1", 0 0, L_0x55f4b1aba500; 1 drivers
v0x55f4b1aba000_0 .net "c2", 0 0, L_0x55f4b1ababd0; 1 drivers
L_0x55f4b1aba5c0 .part v0x55f4b1aba170_0, 0, 1;
L_0x55f4b1aba6b0 .part v0x55f4b1aba230_0, 0, 1;
L_0x55f4b1abad10 .part v0x55f4b1aba170_0, 1, 1;
L_0x55f4b1abae40 .part v0x55f4b1aba230_0, 1, 1;
L_0x55f4b1abb340 .part v0x55f4b1aba170_0, 2, 1;
L_0x55f4b1abb500 .part v0x55f4b1aba230_0, 2, 1;
L_0x55f4b1abb700 .concat8 [ 1 1 1 1], L_0x55f4b1aba400, L_0x55f4b1aba9b0, L_0x55f4b1abb090, L_0x55f4b1abb2b0;
S_0x55f4b1a81d10 .scope module, "fa0" "fulladder" 3 10, 4 1 0, S_0x55f4b1a81ef0;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C0";
.port_info 3 /OUTPUT 1 "S";
.port_info 4 /OUTPUT 1 "C";
L_0x55f4b1ababd0 .functor OR 1, L_0x55f4b1abab40, L_0x55f4b1aba8d0, C4<0>, C4<0>;
v0x55f4b1ab7ae0_0 .net "A", 0 0, L_0x55f4b1abad10; 1 drivers
v0x55f4b1ab7ba0_0 .net "B", 0 0, L_0x55f4b1abae40; 1 drivers
v0x55f4b1ab7c70_0 .net "C", 0 0, L_0x55f4b1ababd0; alias, 1 drivers
v0x55f4b1ab7d40_0 .net "C0", 0 0, L_0x55f4b1aba500; alias, 1 drivers
v0x55f4b1ab7e10_0 .net "C1", 0 0, L_0x55f4b1aba8d0; 1 drivers
v0x55f4b1ab7f00_0 .net "C2", 0 0, L_0x55f4b1abab40; 1 drivers
v0x55f4b1ab7fd0_0 .net "S", 0 0, L_0x55f4b1aba9b0; 1 drivers
v0x55f4b1ab80a0_0 .net "S1", 0 0, L_0x55f4b1aba7a0; 1 drivers
S_0x55f4b1a98e60 .scope module, "ha1" "halfadder" 4 8, 5 1 0, S_0x55f4b1a81d10;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x55f4b1aba7a0 .functor XOR 1, L_0x55f4b1abad10, L_0x55f4b1abae40, C4<0>, C4<0>;
L_0x55f4b1aba8d0 .functor AND 1, L_0x55f4b1abad10, L_0x55f4b1abae40, C4<1>, C4<1>;
v0x55f4b1a89ba0_0 .net "A", 0 0, L_0x55f4b1abad10; alias, 1 drivers
v0x55f4b1a89950_0 .net "B", 0 0, L_0x55f4b1abae40; alias, 1 drivers
v0x55f4b1a885d0_0 .net "C", 0 0, L_0x55f4b1aba8d0; alias, 1 drivers
v0x55f4b1a87200_0 .net "S", 0 0, L_0x55f4b1aba7a0; alias, 1 drivers
S_0x55f4b1ab74f0 .scope module, "ha2" "halfadder" 4 9, 5 1 0, S_0x55f4b1a81d10;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x55f4b1aba9b0 .functor XOR 1, L_0x55f4b1aba7a0, L_0x55f4b1aba500, C4<0>, C4<0>;
L_0x55f4b1abab40 .functor AND 1, L_0x55f4b1aba7a0, L_0x55f4b1aba500, C4<1>, C4<1>;
v0x55f4b1ab7760_0 .net "A", 0 0, L_0x55f4b1aba7a0; alias, 1 drivers
v0x55f4b1ab7800_0 .net "B", 0 0, L_0x55f4b1aba500; alias, 1 drivers
v0x55f4b1ab78a0_0 .net "C", 0 0, L_0x55f4b1abab40; alias, 1 drivers
v0x55f4b1ab7970_0 .net "S", 0 0, L_0x55f4b1aba9b0; alias, 1 drivers
S_0x55f4b1ab8190 .scope module, "fa1" "fulladder" 3 11, 4 1 0, S_0x55f4b1a81ef0;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C0";
.port_info 3 /OUTPUT 1 "S";
.port_info 4 /OUTPUT 1 "C";
L_0x55f4b1abb2b0 .functor OR 1, L_0x55f4b1abb220, L_0x55f4b1abb000, C4<0>, C4<0>;
v0x55f4b1ab8fe0_0 .net "A", 0 0, L_0x55f4b1abb340; 1 drivers
v0x55f4b1ab90a0_0 .net "B", 0 0, L_0x55f4b1abb500; 1 drivers
v0x55f4b1ab9170_0 .net "C", 0 0, L_0x55f4b1abb2b0; 1 drivers
v0x55f4b1ab9240_0 .net "C0", 0 0, L_0x55f4b1ababd0; alias, 1 drivers
v0x55f4b1ab9330_0 .net "C1", 0 0, L_0x55f4b1abb000; 1 drivers
v0x55f4b1ab9420_0 .net "C2", 0 0, L_0x55f4b1abb220; 1 drivers
v0x55f4b1ab94c0_0 .net "S", 0 0, L_0x55f4b1abb090; 1 drivers
v0x55f4b1ab9590_0 .net "S1", 0 0, L_0x55f4b1abaf70; 1 drivers
S_0x55f4b1ab8370 .scope module, "ha1" "halfadder" 4 8, 5 1 0, S_0x55f4b1ab8190;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x55f4b1abaf70 .functor XOR 1, L_0x55f4b1abb340, L_0x55f4b1abb500, C4<0>, C4<0>;
L_0x55f4b1abb000 .functor AND 1, L_0x55f4b1abb340, L_0x55f4b1abb500, C4<1>, C4<1>;
v0x55f4b1ab85f0_0 .net "A", 0 0, L_0x55f4b1abb340; alias, 1 drivers
v0x55f4b1ab86d0_0 .net "B", 0 0, L_0x55f4b1abb500; alias, 1 drivers
v0x55f4b1ab8790_0 .net "C", 0 0, L_0x55f4b1abb000; alias, 1 drivers
v0x55f4b1ab8860_0 .net "S", 0 0, L_0x55f4b1abaf70; alias, 1 drivers
S_0x55f4b1ab89d0 .scope module, "ha2" "halfadder" 4 9, 5 1 0, S_0x55f4b1ab8190;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x55f4b1abb090 .functor XOR 1, L_0x55f4b1abaf70, L_0x55f4b1ababd0, C4<0>, C4<0>;
L_0x55f4b1abb220 .functor AND 1, L_0x55f4b1abaf70, L_0x55f4b1ababd0, C4<1>, C4<1>;
v0x55f4b1ab8c40_0 .net "A", 0 0, L_0x55f4b1abaf70; alias, 1 drivers
v0x55f4b1ab8d10_0 .net "B", 0 0, L_0x55f4b1ababd0; alias, 1 drivers
v0x55f4b1ab8de0_0 .net "C", 0 0, L_0x55f4b1abb220; alias, 1 drivers
v0x55f4b1ab8eb0_0 .net "S", 0 0, L_0x55f4b1abb090; alias, 1 drivers
S_0x55f4b1ab9680 .scope module, "ha0" "halfadder" 3 9, 5 1 0, S_0x55f4b1a81ef0;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x55f4b1aba400 .functor XOR 1, L_0x55f4b1aba5c0, L_0x55f4b1aba6b0, C4<0>, C4<0>;
L_0x55f4b1aba500 .functor AND 1, L_0x55f4b1aba5c0, L_0x55f4b1aba6b0, C4<1>, C4<1>;
v0x55f4b1ab9900_0 .net "A", 0 0, L_0x55f4b1aba5c0; 1 drivers
v0x55f4b1ab99c0_0 .net "B", 0 0, L_0x55f4b1aba6b0; 1 drivers
v0x55f4b1ab9a80_0 .net "C", 0 0, L_0x55f4b1aba500; alias, 1 drivers
v0x55f4b1ab9ba0_0 .net "S", 0 0, L_0x55f4b1aba400; 1 drivers
.scope S_0x55f4b1a88210;
T_0 ;
%vpi_call 2 13 "$dumpfile", "bit3.vcd" {0 0 0};
%vpi_call 2 14 "$dumpvars" {0 0 0};
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 7, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 1, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 6, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 2, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 5, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 3, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 4, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 4, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 3, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 5, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 2, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 6, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 1, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 7, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 1, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 2, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 3, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 4, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 5, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 6, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%pushi/vec4 7, 0, 3;
%store/vec4 v0x55f4b1aba170_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55f4b1aba230_0, 0, 3;
%delay 10, 0;
%vpi_call 2 33 "$display", "Done" {0 0 0};
%end;
.thread T_0;
# The file index is used to find the file name in the following table.
:file_names 6;
"N/A";
"<interactive>";
"bit3Tb.v";
"bit3adder.v";
"fulladder.v";
"halfadder.v";

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bit3-ledTest/bit3.vcd Normal file
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$date
Fri Jul 5 03:41:58 2024
$end
$version
Icarus Verilog
$end
$timescale
1s
$end
$scope module bit3Tb $end
$var wire 4 ! w1 [3:0] $end
$var reg 3 " r1 [2:0] $end
$var reg 3 # r2 [2:0] $end
$scope module uut $end
$var wire 3 $ A [2:0] $end
$var wire 3 % B [2:0] $end
$var wire 1 & c2 $end
$var wire 1 ' c1 $end
$var wire 4 ( C [3:0] $end
$scope module fa0 $end
$var wire 1 ) A $end
$var wire 1 * B $end
$var wire 1 & C $end
$var wire 1 + S1 $end
$var wire 1 , S $end
$var wire 1 - C2 $end
$var wire 1 . C1 $end
$var wire 1 ' C0 $end
$scope module ha1 $end
$var wire 1 ) A $end
$var wire 1 * B $end
$var wire 1 . C $end
$var wire 1 + S $end
$upscope $end
$scope module ha2 $end
$var wire 1 + A $end
$var wire 1 - C $end
$var wire 1 , S $end
$var wire 1 ' B $end
$upscope $end
$upscope $end
$scope module fa1 $end
$var wire 1 / A $end
$var wire 1 0 B $end
$var wire 1 1 C $end
$var wire 1 & C0 $end
$var wire 1 2 S1 $end
$var wire 1 3 S $end
$var wire 1 4 C2 $end
$var wire 1 5 C1 $end
$scope module ha1 $end
$var wire 1 / A $end
$var wire 1 0 B $end
$var wire 1 5 C $end
$var wire 1 2 S $end
$upscope $end
$scope module ha2 $end
$var wire 1 2 A $end
$var wire 1 & B $end
$var wire 1 4 C $end
$var wire 1 3 S $end
$upscope $end
$upscope $end
$scope module ha0 $end
$var wire 1 6 A $end
$var wire 1 7 B $end
$var wire 1 ' C $end
$var wire 1 8 S $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
18
17
06
05
04
13
12
01
10
0/
0.
0-
1,
1+
1*
0)
b111 (
0'
0&
b111 %
b0 $
b111 #
b0 "
b111 !
$end
#10
07
16
b110 #
b110 %
b1 "
b1 $
#20
17
0*
06
1)
b101 #
b101 %
b10 "
b10 $
#30
07
16
b100 #
b100 %
b11 "
b11 $
#40
17
1*
00
06
0)
1/
b11 #
b11 %
b100 "
b100 $
#50
07
16
b10 #
b10 %
b101 "
b101 $
#60
17
0*
06
1)
b1 #
b1 %
b110 "
b110 $
#70
07
16
b0 #
b0 %
b111 "
b111 $
#80
0,
03
b0 !
b0 (
08
0+
02
06
0)
0/
b0 "
b0 $
#90
b1 !
b1 (
18
16
b1 "
b1 $
#100
1,
b10 !
b10 (
08
1+
06
1)
b10 "
b10 $
#110
b11 !
b11 (
18
16
b11 "
b11 $
#120
0,
13
b100 !
b100 (
08
0+
12
06
0)
1/
b100 "
b100 $
#130
b101 !
b101 (
18
16
b101 "
b101 $
#140
1,
b110 !
b110 (
08
1+
06
1)
b110 "
b110 $
#150
b111 !
b111 (
18
16
b111 "
b111 $
#160

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bit3-ledTest/bit3Tb.v Normal file
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module bit3Tb();
reg [2:0] r1, r2;
wire [3:0] w1;
bit3adder uut(
.A(r1),
.B(r2),
.C(w1)
);
initial begin
$dumpfile("bit3.vcd");
$dumpvars;
r1 = 3'b000; r2 = 3'b111; #10;
r1 = 3'b001; r2 = 3'b110; #10;
r1 = 3'b010; r2 = 3'b101; #10;
r1 = 3'b011; r2 = 3'b100; #10;
r1 = 3'b100; r2 = 3'b011; #10;
r1 = 3'b101; r2 = 3'b010; #10;
r1 = 3'b110; r2 = 3'b001; #10;
r1 = 3'b111; r2 = 3'b000; #10;
r1 = 3'b000; r2 = 3'b000; #10;
r1 = 3'b001; r2 = 3'b000; #10;
r1 = 3'b010; r2 = 3'b000; #10;
r1 = 3'b011; r2 = 3'b000; #10;
r1 = 3'b100; r2 = 3'b000; #10;
r1 = 3'b101; r2 = 3'b000; #10;
r1 = 3'b110; r2 = 3'b000; #10;
r1 = 3'b111; r2 = 3'b000; #10;
$display("Done");
end
endmodule

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bit3-ledTest/fulladder.v Normal file
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module fulladder(
input A, B, C0,
output S, C
);
wire S1,C1,C2;
halfadder ha1(A, B, S1, C1);
halfadder ha2(S1, C0, S, C2);
or (C, C2, C1);
endmodule

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bit3-ledTest/halfadder.v Normal file
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module halfadder(
input A,B,
output S,C
);
xor (S, A, B);
and (C, A, B);
endmodule

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#! /usr/bin/vvp
:ivl_version "11.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
S_0x5585ad829490 .scope module, "ledTest" "ledTest" 2 1;
.timescale 0 0;
.port_info 0 /INPUT 2 "v1";
.port_info 1 /INPUT 2 "v2";
.port_info 2 /OUTPUT 6 "L14";
v0x5585ad857530_0 .var "L14", 5 0;
L_0x7f76fd14c018 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0x5585ad857610_0 .net/2u *"_ivl_0", 0 0, L_0x7f76fd14c018; 1 drivers
L_0x7f76fd14c060 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0x5585ad8576f0_0 .net/2u *"_ivl_4", 0 0, L_0x7f76fd14c060; 1 drivers
v0x5585ad8577b0_0 .net "sum", 3 0, L_0x5585ad858d60; 1 drivers
o0x7f76fd195ac8 .functor BUFZ 2, C4<zz>; HiZ drive
v0x5585ad8578a0_0 .net "v1", 1 0, o0x7f76fd195ac8; 0 drivers
o0x7f76fd195af8 .functor BUFZ 2, C4<zz>; HiZ drive
v0x5585ad8579b0_0 .net "v2", 1 0, o0x7f76fd195af8; 0 drivers
E_0x5585ad83ba80 .event edge, v0x5585ad857260_0;
L_0x5585ad858e50 .concat [ 2 1 0 0], o0x7f76fd195ac8, L_0x7f76fd14c018;
L_0x5585ad858f80 .concat [ 2 1 0 0], o0x7f76fd195af8, L_0x7f76fd14c060;
S_0x5585ad822f60 .scope module, "adder" "bit3adder" 2 8, 3 1 0, S_0x5585ad829490;
.timescale 0 0;
.port_info 0 /INPUT 3 "A";
.port_info 1 /INPUT 3 "B";
.port_info 2 /OUTPUT 4 "C";
v0x5585ad857080_0 .net "A", 2 0, L_0x5585ad858e50; 1 drivers
v0x5585ad857180_0 .net "B", 2 0, L_0x5585ad858f80; 1 drivers
v0x5585ad857260_0 .net "C", 3 0, L_0x5585ad858d60; alias, 1 drivers
v0x5585ad857320_0 .net "c1", 0 0, L_0x5585ad857be0; 1 drivers
v0x5585ad8573c0_0 .net "c2", 0 0, L_0x5585ad858280; 1 drivers
L_0x5585ad857d30 .part L_0x5585ad858e50, 0, 1;
L_0x5585ad857dd0 .part L_0x5585ad858f80, 0, 1;
L_0x5585ad8583c0 .part L_0x5585ad858e50, 1, 1;
L_0x5585ad8584f0 .part L_0x5585ad858f80, 1, 1;
L_0x5585ad858ac0 .part L_0x5585ad858e50, 2, 1;
L_0x5585ad858bf0 .part L_0x5585ad858f80, 2, 1;
L_0x5585ad858d60 .concat8 [ 1 1 1 1], L_0x5585ad857b10, L_0x5585ad858060, L_0x5585ad858810, L_0x5585ad858a30;
S_0x5585ad823140 .scope module, "fa0" "fulladder" 3 10, 4 1 0, S_0x5585ad822f60;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C0";
.port_info 3 /OUTPUT 1 "S";
.port_info 4 /OUTPUT 1 "C";
L_0x5585ad858280 .functor OR 1, L_0x5585ad8581f0, L_0x5585ad857f80, C4<0>, C4<0>;
v0x5585ad854ea0_0 .net "A", 0 0, L_0x5585ad8583c0; 1 drivers
v0x5585ad854f60_0 .net "B", 0 0, L_0x5585ad8584f0; 1 drivers
v0x5585ad855030_0 .net "C", 0 0, L_0x5585ad858280; alias, 1 drivers
v0x5585ad855100_0 .net "C0", 0 0, L_0x5585ad857be0; alias, 1 drivers
v0x5585ad8551d0_0 .net "C1", 0 0, L_0x5585ad857f80; 1 drivers
v0x5585ad8552c0_0 .net "C2", 0 0, L_0x5585ad8581f0; 1 drivers
v0x5585ad855390_0 .net "S", 0 0, L_0x5585ad858060; 1 drivers
v0x5585ad855460_0 .net "S1", 0 0, L_0x5585ad857e70; 1 drivers
S_0x5585ad8385a0 .scope module, "ha1" "halfadder" 4 8, 5 1 0, S_0x5585ad823140;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x5585ad857e70 .functor XOR 1, L_0x5585ad8583c0, L_0x5585ad8584f0, C4<0>, C4<0>;
L_0x5585ad857f80 .functor AND 1, L_0x5585ad8583c0, L_0x5585ad8584f0, C4<1>, C4<1>;
v0x5585ad839660_0 .net "A", 0 0, L_0x5585ad8583c0; alias, 1 drivers
v0x5585ad828480_0 .net "B", 0 0, L_0x5585ad8584f0; alias, 1 drivers
v0x5585ad8546d0_0 .net "C", 0 0, L_0x5585ad857f80; alias, 1 drivers
v0x5585ad854770_0 .net "S", 0 0, L_0x5585ad857e70; alias, 1 drivers
S_0x5585ad8548b0 .scope module, "ha2" "halfadder" 4 9, 5 1 0, S_0x5585ad823140;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x5585ad858060 .functor XOR 1, L_0x5585ad857e70, L_0x5585ad857be0, C4<0>, C4<0>;
L_0x5585ad8581f0 .functor AND 1, L_0x5585ad857e70, L_0x5585ad857be0, C4<1>, C4<1>;
v0x5585ad854b20_0 .net "A", 0 0, L_0x5585ad857e70; alias, 1 drivers
v0x5585ad854bc0_0 .net "B", 0 0, L_0x5585ad857be0; alias, 1 drivers
v0x5585ad854c60_0 .net "C", 0 0, L_0x5585ad8581f0; alias, 1 drivers
v0x5585ad854d30_0 .net "S", 0 0, L_0x5585ad858060; alias, 1 drivers
S_0x5585ad855550 .scope module, "fa1" "fulladder" 3 11, 4 1 0, S_0x5585ad822f60;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C0";
.port_info 3 /OUTPUT 1 "S";
.port_info 4 /OUTPUT 1 "C";
L_0x5585ad858a30 .functor OR 1, L_0x5585ad8589a0, L_0x5585ad858730, C4<0>, C4<0>;
v0x5585ad8563a0_0 .net "A", 0 0, L_0x5585ad858ac0; 1 drivers
v0x5585ad856460_0 .net "B", 0 0, L_0x5585ad858bf0; 1 drivers
v0x5585ad856530_0 .net "C", 0 0, L_0x5585ad858a30; 1 drivers
v0x5585ad856600_0 .net "C0", 0 0, L_0x5585ad858280; alias, 1 drivers
v0x5585ad8566f0_0 .net "C1", 0 0, L_0x5585ad858730; 1 drivers
v0x5585ad8567e0_0 .net "C2", 0 0, L_0x5585ad8589a0; 1 drivers
v0x5585ad856880_0 .net "S", 0 0, L_0x5585ad858810; 1 drivers
v0x5585ad856950_0 .net "S1", 0 0, L_0x5585ad858650; 1 drivers
S_0x5585ad855730 .scope module, "ha1" "halfadder" 4 8, 5 1 0, S_0x5585ad855550;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x5585ad858650 .functor XOR 1, L_0x5585ad858ac0, L_0x5585ad858bf0, C4<0>, C4<0>;
L_0x5585ad858730 .functor AND 1, L_0x5585ad858ac0, L_0x5585ad858bf0, C4<1>, C4<1>;
v0x5585ad8559b0_0 .net "A", 0 0, L_0x5585ad858ac0; alias, 1 drivers
v0x5585ad855a90_0 .net "B", 0 0, L_0x5585ad858bf0; alias, 1 drivers
v0x5585ad855b50_0 .net "C", 0 0, L_0x5585ad858730; alias, 1 drivers
v0x5585ad855c20_0 .net "S", 0 0, L_0x5585ad858650; alias, 1 drivers
S_0x5585ad855d90 .scope module, "ha2" "halfadder" 4 9, 5 1 0, S_0x5585ad855550;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x5585ad858810 .functor XOR 1, L_0x5585ad858650, L_0x5585ad858280, C4<0>, C4<0>;
L_0x5585ad8589a0 .functor AND 1, L_0x5585ad858650, L_0x5585ad858280, C4<1>, C4<1>;
v0x5585ad856000_0 .net "A", 0 0, L_0x5585ad858650; alias, 1 drivers
v0x5585ad8560d0_0 .net "B", 0 0, L_0x5585ad858280; alias, 1 drivers
v0x5585ad8561a0_0 .net "C", 0 0, L_0x5585ad8589a0; alias, 1 drivers
v0x5585ad856270_0 .net "S", 0 0, L_0x5585ad858810; alias, 1 drivers
S_0x5585ad856a40 .scope module, "ha0" "halfadder" 3 9, 5 1 0, S_0x5585ad822f60;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x5585ad857b10 .functor XOR 1, L_0x5585ad857d30, L_0x5585ad857dd0, C4<0>, C4<0>;
L_0x5585ad857be0 .functor AND 1, L_0x5585ad857d30, L_0x5585ad857dd0, C4<1>, C4<1>;
v0x5585ad856cc0_0 .net "A", 0 0, L_0x5585ad857d30; 1 drivers
v0x5585ad856d80_0 .net "B", 0 0, L_0x5585ad857dd0; 1 drivers
v0x5585ad856e40_0 .net "C", 0 0, L_0x5585ad857be0; alias, 1 drivers
v0x5585ad856f60_0 .net "S", 0 0, L_0x5585ad857b10; 1 drivers
.scope S_0x5585ad829490;
T_0 ;
%wait E_0x5585ad83ba80;
%pushi/vec4 0, 0, 6;
%store/vec4 v0x5585ad857530_0, 0, 6;
%load/vec4 v0x5585ad8577b0_0;
%cmpi/e 0, 0, 4;
%jmp/0xz T_0.0, 4;
%pushi/vec4 0, 0, 6;
%store/vec4 v0x5585ad857530_0, 0, 6;
%jmp T_0.1;
T_0.0 ;
%load/vec4 v0x5585ad8577b0_0;
%cmpi/e 1, 0, 4;
%jmp/0xz T_0.2, 4;
%pushi/vec4 1, 0, 6;
%store/vec4 v0x5585ad857530_0, 0, 6;
%jmp T_0.3;
T_0.2 ;
%load/vec4 v0x5585ad8577b0_0;
%cmpi/e 2, 0, 4;
%jmp/0xz T_0.4, 4;
%pushi/vec4 3, 0, 6;
%store/vec4 v0x5585ad857530_0, 0, 6;
%jmp T_0.5;
T_0.4 ;
%load/vec4 v0x5585ad8577b0_0;
%cmpi/e 3, 0, 4;
%jmp/0xz T_0.6, 4;
%pushi/vec4 7, 0, 6;
%store/vec4 v0x5585ad857530_0, 0, 6;
%jmp T_0.7;
T_0.6 ;
%load/vec4 v0x5585ad8577b0_0;
%cmpi/e 4, 0, 4;
%jmp/0xz T_0.8, 4;
%pushi/vec4 15, 0, 6;
%store/vec4 v0x5585ad857530_0, 0, 6;
T_0.8 ;
T_0.7 ;
T_0.5 ;
T_0.3 ;
T_0.1 ;
%jmp T_0;
.thread T_0, $push;
# The file index is used to find the file name in the following table.
:file_names 6;
"N/A";
"<interactive>";
"ledTest.v";
"bit3adder.v";
"fulladder.v";
"halfadder.v";

33
bit3-ledTest/ledTest.v Normal file
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module ledTest (
input[1:0] v1, v2,
output [5:0] L14
);
wire[3:0] sum;
bit3adder adder(
.A({1'b0, v1}),
.B({1'b0, v2}),
.C(sum)
);
always @(*) begin
L14 = 6'b000_000;
if(sum == 4'd0) begin
L14 = 6'b000_000;
end
else if(sum == 4'd1)
L14 = 6'b000_001;
else if(sum == 4'd2)
L14 = 6'b000_011;
else if(sum == 4'd3)
L14 = 6'b000_111;
else if(sum == 4'd4)
L14 = 6'b001_111;
end
endmodule

4
bit3-ledTest/ledTest2.v Normal file
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@ -0,0 +1,4 @@
module ledTest2 (
input
)
// Buton verisi eklenecek TO-DO

172
bit3-ledTest/sub1 Normal file
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@ -0,0 +1,172 @@
#! /usr/bin/vvp
:ivl_version "11.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
S_0x55c07506ba60 .scope module, "fulladder" "fulladder" 2 1;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C0";
.port_info 3 /OUTPUT 1 "S";
.port_info 4 /OUTPUT 1 "C";
L_0x55c0750836c0 .functor OR 1, L_0x55c0750835e0, L_0x55c075083400, C4<0>, C4<0>;
o0x7ffa3a6e3018 .functor BUFZ 1, C4<z>; HiZ drive
v0x55c0750823d0_0 .net "A", 0 0, o0x7ffa3a6e3018; 0 drivers
o0x7ffa3a6e3048 .functor BUFZ 1, C4<z>; HiZ drive
v0x55c075082490_0 .net "B", 0 0, o0x7ffa3a6e3048; 0 drivers
v0x55c075082560_0 .net "C", 0 0, L_0x55c0750836c0; 1 drivers
o0x7ffa3a6e3198 .functor BUFZ 1, C4<z>; HiZ drive
v0x55c075082630_0 .net "C0", 0 0, o0x7ffa3a6e3198; 0 drivers
v0x55c075082700_0 .net "C1", 0 0, L_0x55c075083400; 1 drivers
v0x55c0750827f0_0 .net "C2", 0 0, L_0x55c0750835e0; 1 drivers
v0x55c0750828c0_0 .net "S", 0 0, L_0x55c0750834e0; 1 drivers
v0x55c075082990_0 .net "S1", 0 0, L_0x55c0750832f0; 1 drivers
S_0x55c07506dab0 .scope module, "ha1" "halfadder" 2 8, 3 1 0, S_0x55c07506ba60;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x55c0750832f0 .functor XOR 1, o0x7ffa3a6e3018, o0x7ffa3a6e3048, C4<0>, C4<0>;
L_0x55c075083400 .functor AND 1, o0x7ffa3a6e3018, o0x7ffa3a6e3048, C4<1>, C4<1>;
v0x55c07506dd30_0 .net "A", 0 0, o0x7ffa3a6e3018; alias, 0 drivers
v0x55c075081ab0_0 .net "B", 0 0, o0x7ffa3a6e3048; alias, 0 drivers
v0x55c075081b70_0 .net "C", 0 0, L_0x55c075083400; alias, 1 drivers
v0x55c075081c40_0 .net "S", 0 0, L_0x55c0750832f0; alias, 1 drivers
S_0x55c075081db0 .scope module, "ha2" "halfadder" 2 9, 3 1 0, S_0x55c07506ba60;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /OUTPUT 1 "S";
.port_info 3 /OUTPUT 1 "C";
L_0x55c0750834e0 .functor XOR 1, L_0x55c0750832f0, o0x7ffa3a6e3198, C4<0>, C4<0>;
L_0x55c0750835e0 .functor AND 1, L_0x55c0750832f0, o0x7ffa3a6e3198, C4<1>, C4<1>;
v0x55c075082020_0 .net "A", 0 0, L_0x55c0750832f0; alias, 1 drivers
v0x55c0750820f0_0 .net "B", 0 0, o0x7ffa3a6e3198; alias, 0 drivers
v0x55c075082190_0 .net "C", 0 0, L_0x55c0750835e0; alias, 1 drivers
v0x55c075082260_0 .net "S", 0 0, L_0x55c0750834e0; alias, 1 drivers
S_0x55c07506bbf0 .scope module, "test3bitTest" "test3bitTest" 4 1;
.timescale 0 0;
v0x55c075083030_0 .var "r1", 2 0;
v0x55c075083120_0 .var "r2", 2 0;
v0x55c0750831f0_0 .net "w1", 3 0, v0x55c075082ef0_0; 1 drivers
S_0x55c075082a80 .scope module, "uut" "Adder3Bit_behavioral" 4 6, 5 1 0, S_0x55c07506bbf0;
.timescale 0 0;
.port_info 0 /INPUT 3 "A";
.port_info 1 /INPUT 3 "B";
.port_info 2 /OUTPUT 4 "C";
v0x55c075082d10_0 .net "A", 2 0, v0x55c075083030_0; 1 drivers
v0x55c075082e10_0 .net "B", 2 0, v0x55c075083120_0; 1 drivers
v0x55c075082ef0_0 .var "C", 3 0;
E_0x55c075064d90 .event edge, v0x55c075082e10_0, v0x55c075082d10_0;
.scope S_0x55c075082a80;
T_0 ;
%wait E_0x55c075064d90;
%load/vec4 v0x55c075082d10_0;
%pad/u 4;
%load/vec4 v0x55c075082e10_0;
%pad/u 4;
%sub;
%store/vec4 v0x55c075082ef0_0, 0, 4;
%jmp T_0;
.thread T_0, $push;
.scope S_0x55c07506bbf0;
T_1 ;
%vpi_call 4 13 "$dumpfile", "bit3.vcd" {0 0 0};
%vpi_call 4 14 "$dumpvars" {0 0 0};
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 7, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 1, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 6, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 2, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 5, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 3, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 4, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 4, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 3, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 5, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 2, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 6, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 1, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 7, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 1, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 2, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 3, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 4, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 5, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 6, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%pushi/vec4 7, 0, 3;
%store/vec4 v0x55c075083030_0, 0, 3;
%pushi/vec4 0, 0, 3;
%store/vec4 v0x55c075083120_0, 0, 3;
%delay 10, 0;
%vpi_call 4 33 "$display", "Done" {0 0 0};
%end;
.thread T_1;
# The file index is used to find the file name in the following table.
:file_names 6;
"N/A";
"<interactive>";
"fulladder.v";
"halfadder.v";
"test3bitTest.v";
"adder3bitBehavioral.v";