167 lines
3.7 KiB
Bash
Executable File
167 lines
3.7 KiB
Bash
Executable File
#!/bin/sh
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# Automatically generates a PLL parameterized by output freq
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# (instead of cryptic parameters)
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if [ "$#" -ne 2 ]; then
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echo "Usage: $0 FPGA_KIND INPUTFREQ" >&2
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exit 1
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fi
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FPGA_KIND=$1
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INPUTFREQ=$2
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echo "/* "
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echo " * Do not edit this file, it was generated by gen_pll.sh"
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echo " * "
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echo " * FPGA kind : $1"
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echo " * Input frequency: $2 MHz"
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echo " */"
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case $FPGA_KIND in
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"ICE40")
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cat << EOF
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module femtoPLL #(
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parameter freq = 40
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) (
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input wire pclk,
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output wire clk
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);
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SB_PLL40_CORE pll (
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.REFERENCECLK(pclk),
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.PLLOUTCORE(clk),
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.RESETB(1'b1),
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.BYPASS(1'b0)
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);
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defparam pll.FEEDBACK_PATH="SIMPLE";
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defparam pll.PLLOUT_SELECT="GENCLK";
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generate
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case(freq)
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EOF
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for OUTPUTFREQ in `cat frequencies.txt`
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do
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echo " $OUTPUTFREQ: begin"
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icepll -i $INPUTFREQ -o $OUTPUTFREQ \
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| egrep "DIVR|DIVF|DIVQ|FILTER_RANGE" \
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| sed -e 's|[:()]||g' \
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| awk '{printf(" defparam pll.%s = %s;\n",$1,$3);}'
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echo " end"
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done
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cat <<EOF
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default: UNKNOWN_FREQUENCY unknown_frequency();
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endcase
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endgenerate
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endmodule
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EOF
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;;
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"ECP5")
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cat << EOF
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module femtoPLL #(
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parameter freq = 40
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) (
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input wire pclk,
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output wire clk
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);
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(* ICP_CURRENT="12" *) (* LPF_RESISTOR="8" *) (* MFG_ENABLE_FILTEROPAMP="1" *) (* MFG_GMCREF_SEL="2" *)
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EHXPLLL pll_i (
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.RST(1'b0),
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.STDBY(1'b0),
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.CLKI(pclk),
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.CLKOP(clk),
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.CLKFB(clk),
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.CLKINTFB(),
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.PHASESEL0(1'b0),
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.PHASESEL1(1'b0),
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.PHASEDIR(1'b1),
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.PHASESTEP(1'b1),
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.PHASELOADREG(1'b1),
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.PLLWAKESYNC(1'b0),
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.ENCLKOP(1'b0)
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);
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defparam pll_i.PLLRST_ENA = "DISABLED";
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defparam pll_i.INTFB_WAKE = "DISABLED";
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defparam pll_i.STDBY_ENABLE = "DISABLED";
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defparam pll_i.DPHASE_SOURCE = "DISABLED";
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defparam pll_i.OUTDIVIDER_MUXA = "DIVA";
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defparam pll_i.OUTDIVIDER_MUXB = "DIVB";
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defparam pll_i.OUTDIVIDER_MUXC = "DIVC";
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defparam pll_i.OUTDIVIDER_MUXD = "DIVD";
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defparam pll_i.CLKOP_ENABLE = "ENABLED";
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defparam pll_i.CLKOP_FPHASE = 0;
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defparam pll_i.FEEDBK_PATH = "CLKOP";
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generate
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case(freq)
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EOF
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for OUTPUTFREQ in `cat frequencies.txt`
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do
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echo " $OUTPUTFREQ: begin"
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ecppll -i $INPUTFREQ -o $OUTPUTFREQ -f tmp.v > tmp.txt
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cat tmp.v \
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| egrep "CLKI_DIV|CLKOP_DIV|CLKOP_CPHASE|CLKFB_DIV" \
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| sed -e 's|[),.]| |g' -e 's|(|=|g' \
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| awk '{printf(" defparam pll_i.%s;\n",$1);}'
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rm -f tmp.v tmp.txt
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echo " end"
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done
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cat <<EOF
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default: UNKNOWN_FREQUENCY unknown_frequency();
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endcase
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endgenerate
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endmodule
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EOF
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;;
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"GOWIN")
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cat << EOF
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module femtoPLL #(
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parameter freq = 40
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) (
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input wire pclk,
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output wire clk
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);
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rPLL pll_i(
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.CLKOUTP(),
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.CLKOUTD(),
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.CLKOUTD3(),
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.RESET(1'b0),
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.RESET_P(1'b0),
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.CLKFB(1'b0),
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.FBDSEL(6'b0),
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.IDSEL(6'b0),
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.ODSEL(6'b0),
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.PSDA(4'b0),
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.DUTYDA(4'b0),
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.FDLY(4'b0),
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.CLKIN(pclk),
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.CLKOUT(clk)
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);
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defparam pll_i.FCLKIN="$INPUTFREQ";
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generate
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case(freq)
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EOF
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for OUTPUTFREQ in `cat frequencies.txt`
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do
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echo " $OUTPUTFREQ: begin"
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gowin_pll -i $INPUTFREQ -o $OUTPUTFREQ -f tmp.v > tmp.txt
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cat tmp.v \
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| egrep "IDIV_SEL|FBDIV_SEL|ODIV_SEL" \
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| sed -e 's|[),.]| |g' -e 's|(|=|g' \
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| awk '{printf(" defparam pll_i.%s;\n",$1);}'
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rm -f tmp.v tmp.txt
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echo " end"
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done
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cat <<EOF
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default: UNKNOWN_FREQUENCY unknown_frequency();
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endcase
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endgenerate
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endmodule
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EOF
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;;
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*)
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echo FPGA_KIND needs to be one of ICE40,ECP5,GOWIN
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exit 1
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;;
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esac
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