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FIRMWARE
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bench_iverilog.v
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clockworks.v
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LESSON1.md
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README.md
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SOC_pnr.json
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SOC.fs
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SOC.json
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step1.v
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step2.v
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step3.v
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README.md

Toolchain

  • Yosys / Yosys NextPNR / Yosys Apicula

ToDo

  • Check documentation Yosys !
  • RISC-V ISA SET Manual
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Description
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Readme 609 KiB
Languages
Verilog 74.4%
C 23.5%
Shell 1.1%
Assembly 0.5%
Makefile 0.3%
Other 0.2%